An ideal candidate will have at least 8 years of work experience in microprocessor, SoC, memory controller and interconnect IP design.
Responsibilities:
Understanding the high-level specification and requirements of functional units of micro-controller and application processor products.
Define the Micro-architecture for an unit and developing its RTL, including all design stages.
Collaborate with verification team on the test plan development for the blocks and verification closure.
Analyze synthesis/timing reports, identify and address critical areas to meet the PPA targets.
Required Skills and Experience :
Knowledge with CPU, micro-controllers, memory sub systems and bus architectures is a plus.
BS in Electrical and/or Computer Engineering with up to 4 years of experience with RTL design.
Experience with Verilog, coupled with design synthesis targeted to achieve specified frequency, power, and area targets.
Processor system knowledge including basic understanding of SoC systems as well as operating system software.
Great communication & teamwork skills.
This position will be 5 days per week office based.
